1. Field of the Invention
The present invention relates to an optical clock phase lock loop circuit and an optical correlation detection circuit which is ideal for constructing this optical clock phase lock loop circuit, both of which are used for locking the frequency and phase of the clock in optical repeaters, optical terminal units, and optical signal processing of ultra-high-speed optical transmissions.
2. Relevant Art
FIG. 10 is a diagram showing a structural example of a conventional optical clock phase lock loop circuit. In this Figure, an optical signal input terminal 601, optical coupler 602, traveling-wave semiconductor laser amplifier 603, optical bandpass filter 604, optical receiving circuit 605, phase comparator 606, voltage-controlled oscillator 607 (hereinafter referred to as "VCO"), micro-wave mixer 608, optical pulse generator 609, optical pulse multiplexer 610, low frequency transmitter 611, and frequency multiplier 612 are provided. The oscillation frequency of VCO 607 is denoted by f.sub.0, and the value of this oscillation frequency f.sub.0 is set such that the bit rate of the optical signal inputted from optical signal input terminal 601 becomes nf.sub.0 (n is an integer of 1 or greater).
In the following, a concrete construction of the optical pulse multiplexer will be explained. FIG. 11 is a structural diagram of 2.times. optical pulse multiplexer using an optical fiber. In this Figure, input terminal 701, optical fiber coupler 702, optical fiber delay line 703, optical fiber coupler 704, and output terminal 705 are provided. In this structure, the clock optical pulse entering from input terminal 701 is divided into two by means of optical fiber coupler 702. One of these divided clock optical pulses is delayed by T/2+mT (T is the time slot of the input clock optical pulse=1/f.sub.0, and m is an integer) by means of optical fiber delay line 703 and then coupled again by means of optical fiber coupler 704 such that a repetition frequency of 2.times. (multiplied by two) optical clock is formed. In the above case, the repetition frequency of the optical clock formed becomes 2.times. (f.sub.0 +.DELTA.f). In the case when the multiplicity of the clock is greater than 2, the aforementioned multiplexer is connected in a multistage manner. The multiplicity of the clock then becomes 2.sup.K by means of a connection of k stages. However, in this case, the delay amount of the optical fiber delay line used in the kth multiplexer from the incident side is (T/2.sup.K +mT).
FIG. 12 is a structural diagram showing a three-stage 8.times. optical pulse multiplexer using an optical wave guide. In this Figure, an input terminal 801, optical combining/splitting device 802, optical waveguides 803 and 804, optical splitter 805, optical waveguides 806 and 807, optical combining/splitting device 808, optical waveguides 809 and 810, optical combining/splitting device 811, and output terminal 812 are provided. This circuit is constructed by means of integrating the functions explained using FIG. 11 onto a silicon substrate. The functions are the same as those of the structure shown in FIG. 11; however, due to monolithic integration, the present circuit exhibits a compact nature and stable operation not affected by fluctuations of the temperature and the like. An example in which optical pulse multiplexing is achieved using the present circuit is described in S. Kawanishi, et al. ("100 Gbit/s, 50 km, and Non-Repeated Optical Transmission Employing All-Optical Multi/Demultiplexing and PLL Timing", Electronics Letters, vol. 29, pp. 1075-1076, 1993).
In the following, the actions of a conventional optical clock phase lock loop circuit shown in FIG. 10 will be explained. The output signal of VCO 607 undergoes a frequency shift to (f.sub.0 +.DELTA.f) by means of low frequency oscillator 611 and microwave mixer 608. Optical pulse generator 609 is then driven by means of the signal undergoing the above frequency shift. As a result, an optical clock in which the repetition frequency is (f.sub.0 +.DELTA.f) is generated from optical pulse generator 609. The optical clock generated from optical pulse generator 609 as described above is multiplexed by means of optical pulse multiplexer 610 shown by means of either of the structures in FIG. 11 or FIG. 12 and is outputted as a multiplexed clock in which the repetition frequency is n.times. (n is a natural number). The optical clock multiplexed by means of optical clock pulse multiplexer 610 is combined with an optical signal pulse from optical signal input terminal 601 by means of passing through optical coupler 602, and then enters traveling-wave semiconductor laser amplifier 603. At this time, when n=2.sup.K is designated in order for the frequency of the clock following multiplexing to reach a frequency 2.sup.K (f.sub.0 +.DELTA.f) corresponding to the bit rate nf.sub.0 of the optical signal, even when the optical signal pulse is a completely random modulation signal, the n.DELTA.f component, which serves as the correlation of the optical signal pulse and optical clock, is generated by means of these two lights.
In the following, the actions of traveling-wave semiconductor laser amplifier 603 which serves as an optical modulation device will be explained. The wavelength .lambda..sub.sig of the optical signal entering the traveling-wave semiconductor laser amplifier 603 and the wavelength .lambda..sub.clk of the optical clock are apart from each other to a degree such that coherent interference is not generated. In this case, when an optical clock possessing an optical intensity of a certain degree enters the traveling-wave semiconductor laser amplifier, the carrier within traveling-wave semiconductor laser amplifier 603 is modulated. Modulation of this carrier means that the gain of traveling-wave semiconductor laser amplifier 603 is modulated with respect to an optical signal which serves as another optical input. The principles of this modulation are described in detail in Kawanishi, S. et al. ("Ultra-high-speed PLL-type clock recovery circuit based on all-optical gain modulation in traveling-wave laser diode amplifier"; IEEE Journal of Light Wave Technology, vol. 11, pp. 2123-2129; 1993).
As described above, the correlation component of both lights is included in the optical signal wherein the gain is modulated by means of the above optical clock. As a result, this optical signal is extracted by means of optical bandpass filter 604, converted into an electrical signal by means of optical receiving circuit 605, and compared with a standard signal by means of phase comparator 606. PLL operation is then achieved by means of conducting feedback of this output to VCO 607.
In the following, the principle operation of this PLL is explained. Initially, the optical signal (repetition frequency nf.sub.0) inputted from optical signal input terminal 601 is combined with a multiplexed optical clock via optical coupler 602, and inputted into traveling-wave semiconductor laser amplifier 603. For the sake of simplicity, the optical signal pulse and clock are both sine waves, and are respectively expressed by Ps(t) and Pc(t) in the formulae below. EQU Ps(t)=Ps{1+sin n(2.pi.f.sub.0 t+.phi.(t))} (1) EQU Ps(t)=Ps{1+sin 2.pi.n(f.sub.0 +.DELTA.f)t)} (2)
In the formulae, Ps and Pc are constants. In addition, .phi.(t) represents the phase difference (the reciprocal time difference of pulse positions) between the optical signal pulse and the optical clock. This .phi.(t) represents the control objective of PLL, and should be set to 0 or a constant value.
Hence, the optical signal and optical clock enter traveling-wave semiconductor laser amplifier 603 and undergo gain modulation. At this time, among the light outputted from traveling-wave semiconductor laser amplifier 603, P.sub.sout and P.sub.cout correspond to the aforementioned optical signal and optical clock, respectively. P.sub.sout and P.sub.cout are expressed by the following formulae. EQU P.sub.sout =G.multidot.Ps[1+sin n{2.pi.f.sub.0 t+.phi.(t)}].multidot.[1+m(Pc) sin{2.pi.(f.sub.0 +.DELTA.f)t+.pi.}](3) EQU P.sub.cout =G.multidot.Pc[1+sin 2n.pi.(f.sub.0 +.DELTA.f)}.multidot.[1+m(Ps)sin n{2.pi.f.sub.0 t+.phi.(t)+.pi.}](4)
In the above formulae, G represents the unsaturated gain of traveling-wave semiconductor laser amplifier 603, and m(Pc) and m(Ps) represent the degree of gain modulation from the optical clock and optical signal, respectively.
At the time when the clock optical pulse intensity reaches the peak, the number of carriers within traveling-wave semiconductor laser amplifier 603 is minimized. Consequently, the phase of the gain modulation within the traveling-wave semiconductor laser amplifier 603 differs from the phase of the incident optical clock by .pi.. Hence, this phase difference .pi. is added as shown in formulae (3) and (4). Among the optical signal and optical clock outputted from the gain modulated traveling-wave semiconductor laser amplifier 603, only the optical signal is extracted by means of optical filter 604. Since the gain band width (wavelength conversion) of traveling-wave semiconductor laser amplifier 603 is approximately 50 nm, it is possible to extract only one light by means of optical filter 604 by sufficiently separating the wavelengths of the optical signal and optical clock within the aforementioned band. The optical signal extracted by means of optical filter 604 is inputted into optical receiving circuit 605. The photocurrent Os(t) at the time of using PIN-PD as the optical receiving component of optical receiving circuit 605 is shown in the following. ##EQU1##
In the above formula, e represents the electron charge, .eta. represents the quantum efficiency of PIN-PD, and hv represents the energy of the photons. The last item of formula (5) is the n.DELTA.f component generated by means of correlation with the optical clock, and thus, the fluctuation of the phase difference between the optical signal pulse and the optical clock pulse is replaced by the fluctuation of this n.DELTA.f component. PLL operation is then accomplished by means of conducting a phase comparison of this n.DELTA.f output and the .DELTA.f output of the original oscillator with a n-multiplied n.DELTA.f reference signal, and then conducting feedback to VCO 607.
The actual experimental results can be found in the reference, (S. Kawanishi, et al., "Ultra-high-speed PLL-type clock recover circuit based on all-optical gain modulation in traveling-wave laser diode amplifier"; IEEE Journal of Light Wave Technology, vol. 11, pp. 2123-2129, 1993). At this point, since the phase comparison is conducted using the n.DELTA.f component, the phase comparison output is in proportion to n.DELTA..phi.. Consequently, during operation of PLL, when n.DELTA..phi. is 0, the feedback signal to VCO 607 becomes 0, and the power fluctuation of the input optical signal is unaffected. By setting n.DELTA.f to a value of approximately several 100 kHz, high-speed operation is not required in the electrical phase comparator 606, and thus, overall, a high-speed PLL operation can be anticipated.
However, in the above-described conventional PLL circuit, the following two problems exist.
Problem 1
As a method for conducting correlation detection of an optical signal pulse and optical clock pulse, gain modulation of a traveling wave semiconductor laser amplifier is widely used. However, the modulation efficiency therein depends on the frequency as shown in formulae (3) and (4); more concretely, this efficiency is reduced in a manner inversely proportional to the square of the frequency. In the calculation described in S. Kawanishi et al. ("Ultra-high-speed PLL-type clock recover circuit based on all-optical gain modulation in traveling-wave laser diode amplifier"; IEEE Journal of Light Wave Technology, vol. 11, pp. 2123-2129, 1993), the upper limit of the operational speed of PLL using gain modulation of a traveling-wave semiconductor laser amplifier is approximately 100 GHz. Achieving an operational speed greater than this upper limit is considered to be technically difficult.
Problem 2
As a method for conducting correlation detection of an optical signal pulse and optical clock pulse, a method in which the speed of the clock is multiplied using an optical pulse multiplexer in order to match the speed of the clock with the bit rate nf.sub.0 of the optical signal pulse is employed. However, according to this method, not only is the structure of the apparatus involved extremely complex, but also due to the operational principles of the optical time-division-multiplexing circuit, the clock frequency is fixed. The variable range of the clock frequency is at most approximately 5%; any attempts to vary the clock frequency more than this aforementioned amount results in the generation of jitters (fluctuations) in the clock multiplexing, which in turn leads to the malfunctioning of the PLL. Furthermore, according to the structure shown in FIG. 12, only multiples of 2.sup.K can be handled, i.e., 2, 4, 8, 16 . . . , and thus, optical clock multiplication of multiples of random integers is difficult.